1. Field of the Invention
The present invention generally relates to accessing data in a multiple processor system. More specifically, the present invention provides techniques for improving data access efficiency while maintaining cache coherency in a multiple processor system having a multiple cluster architecture.
2. Description of Related Art
Performance limitations have led to the development of a point-to-point architecture for connecting processors in a system with a single memory space. In one example, individual processors can be directly connected to each other through a plurality of point-to-point links to form a cluster of processors. Separate clusters of processors can also be connected. The point-to-point links significantly increase the bandwidth for coprocessing and multiprocessing functions.
In such a multiple processor, multiple cluster system, processors send probe requests in order to perform operations on particular memory lines that may be cached in local or remote nodes. Some common operations include read block and read block modify operations on memory lines. In many examples, cache coherence controllers manage the transmission of probes and probe requests between clusters. However, the information available to a cache coherence controller in a coherence directory may not accurately reflect the actual states of memory lines cached in remote clusters. In particular, many unnecessary probe requests may be sent to remote clusters because of either limited or stale information available to a cache coherence controller.
Consequently, it is desirable to provide techniques for improving the management and distribution of probe requests in systems having multiple clusters of multiple processors connected using point-to-point links.